We are looking for a highly motivated and talented verification engineer to join our team to work on the next generation networking chips. Our product line is a fast growing businessin high speed 10Gbs, 40Gbs , 100Gbs & 200Gbs Ethernet and Optical Transport physical layer devices with very complex design challenges.Job responsibilities include: .Architect and develop verification environment and testbench components such as BFMs and checkers..Develop comprehensive test plan and implement testcases..Verify design in block and chip level environment usingdirected and constrained random testing, assertion-based verification, formal analysis, and functional verification..Perform RTL code coverage, assertion coverage, and gate level simulations..Drive and adopt new verification methodologies and flows for efficiency improvements..Mentor junior engineers on project execution.
ME plus 9 years, or BE plus 11 years, equivalent experience in ASIC design and verification..Experience in verifying designs at system level and block level..Experience using SystemVerilog, VMM or UVM..Familiar with System Verilog Assertions..Strong experience in ASIC design verification flows and DVmethodologies..Networking domain knowledge (e.g. Ethernet, GFP, OTN)..Hands on design verification experience of gigabit Ethernet is a plus..Strong and independent design debugging capability..Strong programming and scripting language capability..Highly motivated and be able to work both independently and as a member of team.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
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