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Private Jobs / Private Sector
Cadence Design Systems, Inc. Hiring for Lead Design Engineer at Bangalore, India Full Time
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
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FPGA Design/Prototyping :
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Experience in FPGA Design, Vivado Flows, Timing closure, Verilog coding
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RTL integration and Simulation
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Resolve the Synthesis and Timing issues.
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Creating Test cases to stress the design.
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System Validation PCIeUSBEthernet :
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Controller and SERDES Architecture understanding
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Fundamentals of PCIeUSBEthernet System enumeration
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Write test codes and scripts to speed up the tests.
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Lead the root cause, analysis and create the test report.
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Application Board Design :
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Build application boards for SERDES to interface with FPGA platforms.
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Coding skills preferably C,C++ and Python.
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Experience: 4-8 Years
We’re doing work that matters. Help us solve what others can’t.