At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
You will be a member of the Central Systems Solutions Engineering team for Tensilica products at Cadence Design Systems, in San Jose, CA. You will focus on architecting, designing and implementing systems and applications using Tensilica processors. You will be responsible for defining and implementing processor system designs, for reference systems and product demonstrations.
This is a senior position, requiring deep technical experience, hands-on design, project management and communication skills. Members of this team are technical experts in their field. In this position you will work with Cadence engineering, marketing and customer support teams.
What the group does:
Develop hardware reference designs on FPGA-based platforms, and simulators, for Tensilica processors and accelerators. Typical applications of these reference systems are AI inferencing, Vision/Imaging, Audio, and IOT.
Work closely with internal RTL and software teams to develop prototyping flows for accelerating software development for Tensilica processors on FPGA emulation platforms.
What you will be doing:
Create new solutions and reference designs for Tensilica processors in AI inferencing, Vision/Imaging, Audio, and IOT. Involves creating RTL designs that integrate Tensilica processors and 3rd-party IPs, and bringing up these designs on FPGA emulation platforms.
Work closely with Tensilica development engineering to define and review future product capabilities.
Manage beta programs and launch of new products.
Develop product demos, and train product marketing and field application engineers on their use. Participate in trade shows and customer meetings as required. Assist field and customers on root causing complex issues in integration of Tensilica processors in customer designs.
Project management and coordination of reference systems development and demonstrations.
Write documentation, application notes, examples, and create and maintain a Knowledge Base on reference system designs.
This position requires the following experience/qualifications:
Minimum of 8 years of industry experience with FPGA-based hardware solutions.
Deep understanding and expertise in designing complex processor-based SOC.
Deep understanding of on-chip communication architectures and interconnect topologies.
Expertise in design methodologies for high speed interfaces, serial protocols and FPGA timing closure.
RTL design knowledge using Verilog/SystemVerilog is required, along with experience using RTL verification tools and flows.
Programming experience with scripting languages
Experience in FPGA-Based prototyping targeting multi-FPGA platforms such as Cadence Protium or Synopsys HAPS is desired
We’re doing work that matters. Help us solve what others can’t.
Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
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