Intel Hiring for DFT Engineer at Bengaluru, India Full Time

Job Description

As an integral part of Intel’s new IDM2.0 strategy, we are establishing Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to the CEO. IFS will be a world-class foundry business and major provider of US and European-based capacity to serve customers globally. Intel Foundry Services will be differentiated from other Foundry offerings with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe – available for customers globally – and a world-class IP portfolio that customers can chose from including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP, along with ARM and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages. This business unit is completely dedicated to the success of its customers with full P and L responsibilities. This model will ensure that our foundry customers’ products will receive our utmost focus in terms of service, technology enablement and capacity commitments. IFS is already engaged with customers today starting with our existing foundry offerings and we are expanding imminently to include our most advanced technologies, which are optimized for cutting-edge performance, making them ideal for high-performance applications.

Job Function/Responsibility

• Role involves contribution to different aspects of DFT including DFT insertion, DFT verification, ATE pattern generation and handshake with Test Engg., First silicon bring-up and Yield analysis for high performance automobile SoCs
• Responsible for driving/contributing following aspects of SoC DFT to closure in a timely fashion
• DFT architecture capable of generating high quality test patterns which results in very low DPMs with optimized test time budget
• DFT insertion and verification (RTL and GLS) of various structural test methods like SCAN/ATPG, Logic BIST, Memory BIST, Boundary SCAN and TAP Architecture (1149.1, 1149.6) including IJTAG (IEEE 1687)
• RTL design and verification of custom DFT logic as per architecture needs
• Development of DFT mode STA constraints at partition and full chip level (using PrimeTime) and working closely with Physical Design team for closure of DFT mode STA
• Generating and delivering patterns for ATE test, first silicon bring-up and yield analysis

Qualifications

Skills/Experience

• Strong knowledge of DFT architectures and methodologies which includes SCAN/ATPG, Logic BIST, Memory BIST, Boundary SCAN, JTAG, Analog DFT
• Strong knowledge of SoC tools/methodology like
• DFT Linting (Spyglass DFT)
• DFT Insertion including SCAN Compression, Logic BIST, ATPG, Memory BIST, Boundary SCAN, JTAG (Siemens Tessent ToolSet)
• Physical Synthesis and SCAN insertion (Fusion Compiler/Genus)
• Test Point Insertion (Tessent/Fusion Compiler/Genus)
• DFT mode STA (PrimeTime)
• Simulation (VCS/NC-Verilog)
• ATE/First Silicon Debug (Tessent SiliconInsight)
• Strong coding skills in industry standard scripting languages
• Solid analytical and problem solving skills
• Good written and oral communication skills with the curiosity to work on rare challenges

Qualification – Bachelors/Masters degree in Electronics required with 6+ years’ experience

Inside this Business Group

As an integral part of Intel’s new IDM2.0 strategy, we establish Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to Intel’s CEO. IFS will be a world-class foundry business and a major US and European-based capacity provider to serve customers globally. We differentiate IFS with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe, plus a world-class IP portfolio including x86 cores, graphics, media, display, AI, interconnect, fabric, and other critical foundational IP, along with Arm and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions using industry-standard design packages. Intel dedicates IFS to the success of its customers with entire Profit and Loss responsibilities. This model will ensure that our foundry customers’ products will receive our utmost focus in terms of service, technology enablement, and capacity commitments. IFS is already engaged with customers today, starting with our existing foundry offerings. We are expanding imminently to include our most advanced technologies optimized for cutting-edge performance, making them ideal for high-performance applications.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

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Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.