Intel Hiring for Runset QA Engineer at Bengaluru, India Full Time

Job Description

layout+verifcation(drc/lvs/erc/density etc) Physical Design Verification Runset Quality Checks is the primary job function Debug the DRC/LVS rule deck failures during regressions and document the failures to the development team Developing the layout patterns to check every design rule in the redbook design manual and integrate them into the QA regression suite is the work nature on daily basis Automation of central regression system and maintain and manage test bench is the crucial job function. Execute physical verification runsets (including DRC, LVS, illegal layer, TUC, fill, LU/IOGNAC, denall, tic, tapein merge, IPC) for Synopsys ICV, Siemens Calibre and Cadence Pegasus on Intel database, mimicking virtual tape-in. Identify/triage clear and meaningful list of discrepancies between the 3 runsets for review and final disposition. Candidate should have good physical verification experience with multiple tape-outs. Folks with clarity of intel flows and process node will be an added plus.

Qualifications

? B Tech 6 yrs experience or MS 4 yrs in Electrical Electronic engineering is required
? Experience with ICV and Calibre Layout verification runsets along with tools like CalibreDRV background is a must
? Experience working on 7nm or lower process nodes desired
? Strong automationscripting skills are required Tcl PythonPerl
? Desire to grow in the physical verification design career path is preferred

Inside this Business Group

As the world’s largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art — from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

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Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.