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Tech Mahindra Hiring for RTL Design Engineer at Bangalore Full Time
Hi All,
Tech Mahindra is hiring RTL Design Engineers!!!!!
Candidates must have
- At least 3 to 7 years of logic design and RTL coding experience with sound knowledge on Verification and implementation concepts
- Experience in networking ASIC architecture, micro-architecture development, design and debug
- Ability to code readable, maintainable, verifiable and synthesizable logic in Verilog and/or System Verilog
- Experience with synthesis, CDC, STA, formality, ECO process, tool flows and scripting
- Knowledge in one or more of the following areas, a definite plus
- PCIe (protocol design, link layer, integration of PHY layer)
- Ethernet (layer 2/3/4 protocols, GMII/XGMII, integration of PHY layer)
- Computer architecture/Processor fundamentals
Location: Bangalore/Kochi/Vizag/Ahmedabad